1. Field of the Invention
The present invention relates to a printed wiring board having a semiconductor package including a heat sink mounted thereon, a printed circuit board including the printed wiring board, and a printed circuit board manufacturing method.
2. Description of the Related Art
In a semiconductor package such as an IC which is mounted on a printed wiring board, a heat sink for dissipating generated heat is provided on a rear surface of a semiconductor package body. This is because, in recent years, as signal processing in a semiconductor package becomes faster, heat generated in the semiconductor package tends to increase, and it is necessary to efficiently dissipate heat in the semiconductor package. Japanese Patent Application Laid-Open No. 2006-80168 discloses a printed wiring board in which, for the purpose of efficiently dissipating heat generated in such a semiconductor package, a heat sink of the semiconductor package and a conductor pattern on a mounting surface of the printed wiring board are soldered.
The conductor pattern on the mounting surface is required to be opposed to the heat sink of the semiconductor package and to be sized so as not to interfere with a pin of the semiconductor package. Further, an insulator used for the printed wiring board has a thermal conductivity which is lower than that of the conductor pattern, and thus, the conductor pattern is liable to store heat. Therefore, in Japanese Patent Application Laid-Open No. 2006-80168, another conductor pattern for dissipating heat is provided on a surface opposite to the mounting surface of the printed wiring board, and through holes thermally connect the conductor pattern on the mounting surface and the conductor pattern on the opposite surface. This enables heat generated in a die of the semiconductor package to be conducted through the heat sink, the solder, the conductor pattern on the mounting surface, the through holes, and the conductor pattern on the opposite surface in this order to be dissipated from the conductor pattern on the opposite surface into the atmosphere.
By the way, in a reflow step of soldering the heat sink and the conductor pattern on the mounting surface, if molten solder is drawn in the through holes, poor soldering is caused, which results in lowered mountability of the semiconductor package and lowered heat dissipation.
Therefore, in Japanese Patent Application Laid-Open No. 2006-80168, the conductor pattern on the mounting surface is divided by a solder resist, and the through holes are arranged in a center area thereof which is not to be soldered. The solder resist is caused to function as a barrier to the molten solder in the reflow step in an attempt to prevent the solder from flowing in the through holes.
However, even if the conductor pattern for dissipating heat is divided and the through holes are provided in the center area thereof which is not to be soldered as in the structure disclosed in Japanese Patent Application Laid-Open No. 2006-80168, the through holes are located so as to be opposed to the heat sink of the semiconductor package. Further, even after the reflow step is completed, residual heat remaining in the conductor pattern on the opposite surface tends to be conducted via the through holes to the conductor pattern on the mounting surface. As a result, the solder is melted by the residual heat conducted to the conductor pattern on the mounting surface, and when being pressed against the heat sink to flow, the solder crosses the solder resist and flows in the through holes. Therefore, the structure disclosed in Japanese Patent Application Laid-Open No. 2006-80168 cannot effectively eliminate poor soldering, and further improvement is required.